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| PD - 95149 IRL2910S/LPbF Logic-Level Gate Drive l Surface Mount l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l Fast Switching l Fully Avalanche Rated l Lead-Free Description l HEXFET(R) Power MOSFET D VDSS = 100V RDS(on) = 0.026 G S ID = 55A Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL2910L) is available for lowprofile applications. D 2 P ak T O -26 2 Parameter Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 55 39 190 3.8 200 1.3 16 520 29 20 5.0 -55 to + 175 300 (1.6mm from case ) Units A W W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)** Typ. --- --- Max. 0.75 40 Units C/W 04/19/04 IRL2910S/LPbF Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Min. 100 --- --- --- --- 1.0 28 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.026 VGS = 10V, ID = 29A 0.030 VGS = 5.0V, ID = 29A 0.040 VGS = 4.0V, ID = 24A 2.0 V VDS = VGS, ID = 250A --- S VDS = 50V, ID = 29A 25 VDS = 100V, VGS = 0V A 250 VDS = 80V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 140 ID = 29A 20 nC VDS = 80V 81 VGS = 5.0V, See Fig. 6 and 13 --- VDD = 50V --- ID = 29A ns --- RG = 1.4, VGS = 5.0V --- RD = 1.7, See Fig. 10 Between lead, 7.5 --- nH and center of die contact 3700 --- VGS = 0V 630 --- pF VDS = 25V 330 --- = 1.0MHz, See Fig. 5 Typ. --- 0.12 --- --- --- --- --- --- --- --- --- --- --- --- 11 100 49 55 Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 55 showing the A G integral reverse --- --- 190 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 29A, VGS = 0V --- 240 350 ns TJ = 25C, IF = 29A --- 1.8 2.7 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Repetitive rating; pulse width limited by Pulse width 300s; duty cycle 2%. max. junction temperature. ( See fig. 11 ) Uses IRL2910 data and test conditions VDD = 25V, starting TJ = 25C, L = 1.2mH RG = 25, IAS = 29A. (See Figure 12) ISD 29A, di/dt 490A/s, VDD V(BR)DSS, TJ 175C ** When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. IRL2910S/LPbF 1000 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 1000 ID , Drain-to-Source Current (A ) 100 ID , Drain-to-Source Current (A ) VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 100 10 10 2.5 V 2.5 V 1 0.1 1 2 0 s P U LS E W ID TH T J = 2 5C 10 100 A 1 0.1 1 2 0 s P U LS E W ID TH T J = 1 75 C 10 100 A V D S , D rain-to-S ource V oltage (V ) V D S , D rain-to-S ource V oltage (V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 3.0 R D S (on) , Drain-to-S ource O n Resistance (N orm alized) I D = 4 8A I D , D ra in -to-S ourc e C urrent (A) 2.5 100 TJ = 2 5 C TJ = 17 5 C 2.0 1.5 10 1.0 0.5 1 2.0 2.5 3.0 3.5 4.0 V D S = 5 0V 2 0 s P U L S E W ID TH 4.5 5.0 5.5 6.0 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 10 V 100 120 140 160 180 A V G S , G ate-to -Sou rce Voltage (V) T J , Junction T em perature (C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRL2910S/LPbF 6000 5000 4000 V G S , G a te-to-S ou rc e V o ltag e (V ) V GS C iss C rs s C iss C o ss = = = = 0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d 15 I D = 2 9A V D S = 80 V V D S = 50 V V D S = 20 V 12 C , Capacitance (pF) 9 3000 2000 C o ss C rss 6 3 1000 0 1 10 100 A 0 0 40 80 FO R TE S T CIR C U IT S E E FIG U R E 1 3 120 160 200 A V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 I S D , R everse Drain C urrent (A ) O P E R A T IO N IN T H IS A R E A L IM ITE D B Y R D S (o n) I D , D rain Current (A ) 100 10 s 100 100 s T J = 1 75 C T J = 25 C 10 1m s 10 0.4 0.8 1.2 1.6 V G S = 0V A 1 1 T C = 25 C T J = 17 5C S ing le P u lse 10 10m s 2.0 100 1000 A V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area IRL2910S/LPbF 50 VDS 40 RD VGS RG I D , D rain Current (A m ps) D.U.T. + -VDD 30 5.0V Pulse Width 1 s Duty Factor 0.1 % 20 Fig 10a. Switching Time Test Circuit 10 VDS 90% 0 25 50 75 100 125 150 A 175 TC , C as e T em perature (C ) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 Therm al R es ponse (Z thJ C ) 1 D = 0 .5 0 0 .2 0 0.1 0 .1 0 0 .0 5 0 .0 2 0 .0 1 N o te s: 1 . D u ty fa c tor D = t PD M t 1 t2 S IN G L E P U L S E (T H E R M A L R E S P O N S E ) 0.0001 0.001 0.01 1 /t 2 0.01 0.00001 2 . P e a k TJ = P D M x Z th J C + T C A 10 0.1 1 t 1 , R e ctan g u lar P u lse D u ra tio n (s e c ) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case IRL2910S/LPbF 1400 E A S , S ingle P ulse A valanche E nergy (m J) TO P 1200 1 5V B O TTO M ID 12 A 2 0A 29 A 1000 VDS L D R IV E R 800 RG 20V D .U .T IA S tp + V - DD 600 A 0 .0 1 400 Fig 12a. Unclamped Inductive Test Circuit 200 0 V D D = 25 V 25 50 75 100 125 150 V (B R )D SS tp 175 A S tarting T J , J unc tion T em perature (C ) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F 5.0 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit IRL2910S/LPbF Peak Diode Recovery dv/dt Test Circuit D.U.T + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS IRL2910S/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H IS IS AN IR F 5 30 S WIT H L OT COD E 80 24 AS S E MB L E D ON WW 0 2, 200 0 IN T H E AS S E MB L Y L INE "L " N ote: "P " in as s embly line pos ition indicates "L ead-F ree" IN T E R N AT ION AL R E CT IF IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R F 530 S D AT E COD E YE AR 0 = 2 000 WE E K 0 2 L IN E L OR INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T N U MB E R F 530S DAT E CODE P = DE S IGN AT E S L E AD-F R E E P R ODU CT (OPT IONAL ) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E CODE IRL2910S/LPbF TO-262 Package Outline TO-262 Part Marking Information E XAMP L E : T H IS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P " in as s embly line pos ition indicates "L ead-F ree" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C OR INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE P = DE S IGNAT E S L E AD-F R E E P R ODU CT (OP T IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE IRL2910S/LPbF D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1 ) 3 .9 0 (.1 5 3 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 ) F E E D D IR E CT IO N 1 .8 5 (.0 7 3 ) 1 .6 5 (.0 6 5 ) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TRL 1 0 .9 0 (.4 2 9 ) 1 0 .7 0 (.4 2 1 ) 1 .7 5 (.0 6 9 ) 1 .2 5 (.0 4 9 ) 1 6 .1 0 (.6 3 4 ) 1 5 .9 0 (.6 2 6 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 ) F E E D D IR E CT IO N 1 3.5 0 (.5 3 2) 1 2.8 0 (.5 0 4) 27 .4 0 (1 .0 79 ) 23 .9 0 (.94 1) 4 3 3 0 .00 (14 .1 7 3) M AX . 60 .00 (2 .36 2) M IN . N O TES : 1 . C O M F O R M S T O E IA -4 18 . 2 . C O N T R O L L IN G D IM E N S IO N : M IL LIM E T E R . 3 . D IM E N S IO N M E A S U R E D @ H U B . 4 . IN C L U D E S F L A N G E D IS T O R T IO N @ O U T E R E D G E . 3 0 .40 (1 .19 7 ) M AX . 2 6 .4 0 (1 .03 9 ) 2 4 .4 0 (.9 61 ) 3 4 Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/04 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/ |
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